pfb_5n_vhdl/poly_fir_pkg.vhd

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE ieee.std_logic_unsigned.ALL;
USE ieee.std_logic_signed.ALL;
USE work.PFB_PKG.ALL;

PACKAGE POLY_FIR_PKG IS

  -- NOTES and PACKAGE INSTRUCTIONS :
  -- cst_downsampling_factor must be a multiplier OF cst_nb_samples_adc_in
  -- and cst_nb_subfilters/cst_nb_samples_adc_in*cst_downsampling_factor must be an integer
  -- with cst_downsampling_factor < or = cst_nb_subfilters.
  --
  -- INPUT  : vector of samples (cst_nb_samples_adc_in samples);
  -- OUTPUT : 2D matrix of samples (matrix_fir_data_out(y)(x), with y the
  -- subfilter number, and x the xth parallel fir);
  --
  -- the lower parallel fir, the older result.

  -- -- CONSTANTS -- --

  -- ADC
  CONSTANT cst_w_in  : natural := cst_w_in_pfb ;    -- ADC in bitwidth
  CONSTANT cst_w_out : natural := cst_w_polyfir_out_dft_in_pfb;

  CONSTANT cst_nb_samples_adc_in : natural := cst_nb_samples_adc_in_pfb;  -- ADC in nb samples

  -- FILTER
  --coefficients
  CONSTANT cst_w_coeff                         : natural := cst_w_coeffs_polyfir_pfb;  -- coeffs bitwidth
  CONSTANT cst_nb_coeffs_filter_in             : natural := cst_nb_coeffs_polyfir_pfb;

  -- FIR
  CONSTANT cst_downsampling_factor : natural := cst_polyfir_downsampling_factor_pfb;
  -- POLYPHASE FILTER
  CONSTANT cst_nb_subfilters       : natural := cst_nb_subfilters_pfb;

  -- -- CALCULATIONS -- --


  -- SHIFT REG

  CONSTANT cst_nb_coeffs_subfilter_in      : natural := cst_nb_coeffs_filter_in/cst_nb_subfilters;
  CONSTANT cst_log2_sup_nb_coeffs_subfilter_in : natural := cst_log2_sup_nb_coeffs_subfilter_pfb;
  CONSTANT cst_nb_samples_shiftreg_temp_in : natural := cst_nb_coeffs_subfilter_in + cst_nb_samples_adc_in/cst_downsampling_factor;
  -- mult
  CONSTANT cst_w_mult_out                  : natural := cst_w_coeff+cst_w_in;
  -- adder
  CONSTANT cst_log2_adder_stages           : natural := cst_log2_sup_nb_coeffs_subfilter_in;
  -- fir
  CONSTANT cst_w_fir_adder_out             : natural := cst_w_mult_out+cst_log2_adder_stages;
  CONSTANT cst_nb_parallel_firs            : natural := cst_nb_parallel_firs_dfts_pfb;

  -- TYPES

  -- ADC
  SUBTYPE smpl_adc_data_in IS smpl_real_imag_adc_data_in_pfb;
  SUBTYPE smpl_fir_data_out IS smpl_real_imag_polyfir_out_dft_in_pfb;


  -- SHIFT REG

  TYPE vect_adc_data_out IS ARRAY (0 TO cst_nb_samples_adc_in-1) OF smpl_adc_data_in;
  TYPE vect_fir_data_in IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_adc_data_in;
  TYPE vect_reg_data IS ARRAY(0 TO cst_nb_samples_shiftreg_temp_in-1) OF smpl_adc_data_in;
  TYPE matrix_reg_data IS ARRAY(0 TO cst_nb_subfilters-1) OF vect_reg_data;

  TYPE matrix_reg_data_out IS ARRAY(0 TO cst_nb_parallel_firs-1) OF vect_fir_data_in;
  TYPE matrix3D_reg_data_out IS ARRAY (0 TO cst_nb_subfilters-1) OF matrix_reg_data_out;

  -- FILTER

  SUBTYPE smpl_coeff IS std_logic_vector(cst_w_coeff-1 DOWNTO 0);

  -- mult
  SUBTYPE smpl_mult_data_out IS std_logic_vector(cst_w_mult_out-1 DOWNTO 0);
  SUBTYPE smpl_mult_data_out_signed IS signed(cst_w_mult_out-1 DOWNTO 0);
  SUBTYPE smpl_coeffs_signed IS signed(cst_w_coeff-1 DOWNTO 0);
  SUBTYPE smpl_mult_data_in_signed IS signed(cst_w_in-1 DOWNTO 0);
  TYPE vect_polyfir_coeffs_in IS ARRAY (0 TO cst_nb_coeffs_filter_in-1) OF smpl_coeff;
  TYPE vect_data_mult_in_signed IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_mult_data_in_signed;
  TYPE vect_fir_coeffs_in IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_coeff;
  TYPE vect_mult_coeffs_signed IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_coeffs_signed;
  TYPE vect_mult_data_out IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_mult_data_out;
  TYPE vect_mult_data_out_signed IS ARRAY(0 TO cst_nb_coeffs_subfilter_in-1) OF smpl_mult_data_out_signed;
  TYPE matrix_fir_coeffs_in IS ARRAY (0 TO cst_nb_subfilters-1) OF vect_fir_coeffs_in;

  -- adder
  TYPE vect_adder_generic IS ARRAY(0 TO 2**(cst_log2_adder_stages)-1) OF std_logic_vector(cst_w_fir_adder_out-1 DOWNTO 0);
  TYPE vect_adder_generic_signed IS ARRAY(0 TO 2**(cst_log2_adder_stages)-1) OF signed(cst_w_fir_adder_out-1 DOWNTO 0);
  TYPE matrix_adder_generic IS ARRAY(0 TO cst_log2_adder_stages) OF vect_adder_generic;
  TYPE matrix_adder_generic_signed IS ARRAY(0 TO cst_log2_adder_stages) OF vect_adder_generic_signed;

  -- fir
  SUBTYPE smpl_fir_adder_data_out IS std_logic_vector(cst_w_fir_adder_out-1 DOWNTO 0);
  TYPE vect_fir_adder_data_out IS ARRAY (0 TO cst_nb_parallel_firs-1) OF smpl_fir_adder_data_out;
  TYPE vect_fir_data_out IS ARRAY(0 TO cst_nb_parallel_firs-1) OF smpl_fir_data_out;

  -- POLYPHASE FILTER

  TYPE matrix_fir_data_out IS ARRAY (0 TO cst_nb_subfilters-1) OF vect_fir_data_out;





END;