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- LIBRARY ieee;
- USE ieee.std_logic_1164.ALL;
- USE work.POLY_FIR_PKG.ALL;
-
- ENTITY TREE_FIR IS
- PORT( i_clk : IN std_logic;
- i_coeffs : IN vect_fir_coeffs_in;
- i_data : IN matrix_reg_data_out;
- o_data : OUT vect_fir_data_out := (OTHERS => (OTHERS => '0'))
- );
- END TREE_FIR;
-
- ARCHITECTURE Simple_Fir OF TREE_FIR IS
-
- SIGNAL partial_fir_out : vect_fir_adder_data_out := (OTHERS => (OTHERS => '0'));
-
- BEGIN
-
- -- purpose: wiring: instanciation of each partial FIR to make 1 FIR
- partial_fir_for : FOR i IN 0 TO cst_nb_parallel_firs-1 GENERATE
- partial_fir_inst : ENTITY work.PARTIAL_FIR(Adder_Tree)
- PORT MAP( i_clk => i_clk,
- i_coeffs => i_coeffs,
- i_data => i_data(i),
- o_data => partial_fir_out(i)
- );
- o_data(i)<= partial_fir_out(i)(cst_w_fir_adder_out-1 DOWNTO cst_w_fir_adder_out-cst_w_out);
- END GENERATE partial_fir_for;
-
-
- END Simple_Fir;
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