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- LIBRARY ieee;
- USE ieee.std_logic_1164.ALL;
- USE ieee.numeric_std.ALL;
- USE work.PFB_PKG.ALL;
- USE work.POLY_FIR_PKG.ALL;
- USE work.FIVEn_DFT_PKG.ALL;
-
- ENTITY PFB_blk IS
-
- PORT (
- i_clk : IN std_logic;
- i_data : IN vect_adc_data_out_pfb;
- i_coeffs : IN vect_polyfir_coeffs_in;
- o_data : OUT vect_dft_output_pfb);
-
- END ENTITY PFB_blk;
-
- ARCHITECTURE polyfir_dft OF PFB_blk IS
-
- TYPE matrix_polyfir_data_out_transpose IS ARRAY (0 TO cst_nb_parallel_firs_dfts_pfb-1) OF vect_dft_input;
- TYPE matrix_dft_output_pfb IS ARRAY (0 TO cst_nb_parallel_firs_dfts_pfb-1) OF vect_dft_output;
-
- SIGNAL input_polyfir_re : vect_adc_data_out := (OTHERS => (OTHERS => '0'));
- SIGNAL input_polyfir_im : vect_adc_data_out := (OTHERS => (OTHERS => '0'));
- SIGNAL matrix_out_polyfir_re : matrix_fir_data_out := (OTHERS => (OTHERS => (OTHERS => '0')));
- SIGNAL matrix_out_polyfir_im : matrix_fir_data_out := (OTHERS => (OTHERS => (OTHERS => '0')));
- SIGNAL matrix_out_dft_re : matrix_dft_output_pfb := (OTHERS => (OTHERS => (OTHERS => '0')));
- SIGNAL matrix_out_dft_im : matrix_dft_output_pfb := (OTHERS => (OTHERS => (OTHERS => '0')));
- SIGNAL matrix_polyfir_out_transpose_re : matrix_polyfir_data_out_transpose := (OTHERS => (OTHERS => ( OTHERS => '0')));
- SIGNAL matrix_polyfir_out_transpose_im : matrix_polyfir_data_out_transpose := (OTHERS => (OTHERS => ( OTHERS => '0')));
-
- BEGIN -- ARCHITECTURE polyfir_dft
-
-
-
- -- purpose: wiring: placing imaginary and real part in different vectors.
- inputs_discriminating_real_imag : FOR i IN 0 TO cst_nb_samples_adc_in_pfb-1 GENERATE
- input_polyfir_re(i) <= i_data(2*i);
- input_polyfir_im(i) <= i_data(2*i+1);
- END GENERATE inputs_discriminating_real_imag;
-
-
-
- -- instanciation of 2 polyphase filter (imaginary and real part)
- polyfir_blk_re : ENTITY work.poly_fir_blk(polyphase)
- PORT MAP(
- i_clk => i_clk,
- i_coeffs => i_coeffs,
- i_data => input_polyfir_re,
- o_data => matrix_out_polyfir_re);
-
- polyfir_blk_im : ENTITY work.poly_fir_blk(polyphase)
- PORT MAP(
- i_clk => i_clk,
- i_coeffs => i_coeffs,
- i_data => input_polyfir_im,
- o_data => matrix_out_polyfir_im);
-
-
-
- -- purpose: wiring: transpose the polyfir matrixes
- transpose_for: FOR i IN 0 TO cst_nb_parallel_firs_dfts_pfb-1 GENERATE
- transpose_data: FOR j IN 0 TO cst_nb_subfilters_pfb-1 GENERATE
- matrix_polyfir_out_transpose_re(i)(j) <= matrix_out_polyfir_re(j)(i);
- matrix_polyfir_out_transpose_im(i)(j) <= matrix_out_polyfir_im(j)(i);
- END GENERATE transpose_data;
- END GENERATE transpose_for;
-
-
-
- -- instanciation of cst_nb_parallel_firs_dfts_pfb dfts
- instanciating_parallel_dfts : FOR i IN 0 TO cst_nb_parallel_firs_dfts_pfb-1 GENERATE
- dft_inst : ENTITY work.FFT_tree(instanciating_cells)
- GENERIC MAP (
- nb_bits_shift_round => cst_nb_bits_shift_round_pfb)
- PORT MAP(
- i_clk => i_clk,
- i_data_re => matrix_polyfir_out_transpose_re(i),
- i_data_im => matrix_polyfir_out_transpose_im(i),
- o_data_re => matrix_out_dft_re(i),
- o_data_im => matrix_out_dft_im(i)
- );
- END GENERATE instanciating_parallel_dfts;
-
-
-
- -- purpose: wiring: placing imaginary part and real part every other sample
- fill_vect_output : FOR parallel_dft_nb IN 0 TO cst_nb_parallel_firs_dfts_pfb-1 GENERATE
- fill_line_from_matrix : FOR dft_sample_nb IN 0 TO cst_nb_subfilters_pfb-1 GENERATE
- o_data(2*dft_sample_nb+parallel_dft_nb*2*cst_nb_subfilters_pfb) <= matrix_out_dft_re(parallel_dft_nb)(dft_sample_nb);
- o_data(2*dft_sample_nb+parallel_dft_nb*2*cst_nb_subfilters_pfb +1) <= matrix_out_dft_im(parallel_dft_nb)(dft_sample_nb);
-
- END GENERATE fill_line_from_matrix;
- END GENERATE fill_vect_output;
-
-
- END ARCHITECTURE polyfir_dft;
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