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@@ -1,85 +0,0 @@ |
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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USE work.POLY_FIR_PKG.ALL;
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ENTITY PARTIAL_FIR IS
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PORT(i_clk : IN std_logic;
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i_coeffs : IN vect_fir_coeffs_in;
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i_data : IN vect_fir_data_in;
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o_data : OUT smpl_fir_adder_data_out
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);
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END PARTIAL_FIR;
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ARCHITECTURE Adder_Tree OF PARTIAL_FIR IS
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SIGNAL matrix_adder_tree : matrix_adder_generic := (OTHERS => (OTHERS => (OTHERS => '0')));
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SIGNAL matrix_adder_tree_signed : matrix_adder_generic_signed := (OTHERS => (OTHERS => (OTHERS => '0')));
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SIGNAL vect_i_coeffs : vect_fir_coeffs_in;
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SIGNAL mult_out : vect_mult_data_out := (OTHERS => (OTHERS => '0'));
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BEGIN
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-- purpose: assign the filter in a decreasing order
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in_assignment : FOR i IN 0 TO cst_nb_coeffs_subfilter_in-1 GENERATE
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vect_i_coeffs(i) <= i_coeffs(cst_nb_coeffs_subfilter_in-1-i);
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END GENERATE in_assignment;
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-- instanciation of MULT_BLK(Mult_Path), multiplying each element from i_data
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-- with the correct coefficient in vect_i_coeffs
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mult_inst : ENTITY work.MULT_BLK(Mult_Path)
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PORT MAP(i_clk => i_clk,
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i_data => i_data,
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i_coeffs => vect_i_coeffs,
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o_data => mult_out(0 TO cst_nb_coeffs_subfilter_in-1)
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);
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-- purpose: fill the input (which is the result of multiplication) of the addition tree matrix
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-- inputs: mult_out
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-- outputs: matrix_adder_tree(0)
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mult_out_wire : FOR i IN 0 TO cst_nb_coeffs_subfilter_in-1 GENERATE
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matrix_adder_tree(0)(i)(cst_w_mult_out-1 DOWNTO 0) <= mult_out(i)(cst_w_mult_out-1 DOWNTO 0);
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END GENERATE mult_out_wire;
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-- purpose: wiring: construct the adder tree. Construction:
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--
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-- 0-+--+----+->
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-- 1/ / /
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-- 2-+/ /
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-- 3/ /
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-- 4-+--+/
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-- 5/ /
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-- 6-+/
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-- 7/
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--
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-- inputs: matrix_adder_tree(0)
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-- outputs: matrix_adder_tree(cst_log2_adder_stages)
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stages_loop : FOR stage IN 1 TO cst_log2_adder_stages GENERATE
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cell_loops : FOR cell IN 0 TO 2**(cst_log2_adder_stages-stage)-1 GENERATE
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matrix_adder_tree_signed(stage)((2**stage)*cell)(cst_w_mult_out+stage-1 DOWNTO 0) <= signed(matrix_adder_tree(stage-1)((2**stage)*cell)(cst_w_mult_out+stage-2)&matrix_adder_tree(stage-1)((2**stage)*cell)(cst_w_mult_out+stage-2 DOWNTO 0))+signed(matrix_adder_tree(stage-1)((2**(stage-1))*(2*cell+1))(cst_w_mult_out+stage-2)&matrix_adder_tree(stage-1)((2**(stage-1))*(2*cell+1))(cst_w_mult_out+stage-2 DOWNTO 0));
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matrix_adder_tree(stage)((2**stage)*cell)(cst_w_mult_out+stage-1 DOWNTO 0) <= std_logic_vector(unsigned(matrix_adder_tree_signed(stage)((2**stage)*cell)(cst_w_mult_out+stage-1 DOWNTO 0)));
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END GENERATE cell_loops;
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END GENERATE stages_loop;
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-- purpose: take the result when adder tree finished
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adder_tree_process : PROCESS(i_clk)
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BEGIN
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IF(rising_edge(i_clk)) THEN
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o_data <= matrix_adder_tree(cst_log2_adder_stages)(0);
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END IF;
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END PROCESS;
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END Adder_Tree;
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