Simulation files of Polyphase Filter in VHDL for FPGA.
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  1. LIBRARY ieee;
  2. USE ieee.std_logic_1164.ALL;
  3. USE work.POLY_FIR_PKG.ALL;
  4. ENTITY poly_fir_blk IS
  5. PORT (
  6. i_clk : IN std_logic;
  7. i_coeffs : IN vect_polyfir_coeffs_in;
  8. i_data : IN vect_adc_data_out;
  9. o_data : OUT matrix_fir_data_out);
  10. END ENTITY poly_fir_blk;
  11. ARCHITECTURE polyphase OF poly_fir_blk IS
  12. SIGNAL matrix3D_reg_out_simple_rif_in : matrix3D_reg_data_out := (OTHERS => (OTHERS => (OTHERS => (OTHERS => '0'))));
  13. SIGNAL matrix_coeffs : matrix_fir_coeffs_in := (OTHERS => (OTHERS => (OTHERS => '0')));
  14. SIGNAL matrix_fir_out : matrix_fir_data_out := (OTHERS => (OTHERS => (OTHERS => '0')));
  15. BEGIN -- ARCHITECTURE polyphase
  16. --purpose: fill the polyphase coefficients into a 2D matrix from the filter vector (1D)
  17. fill_coeff : PROCESS(i_coeffs) -- rearrange coeffs into a matrix
  18. VARIABLE coeff_nb : natural;
  19. VARIABLE sf_coeff : natural;
  20. VARIABLE subfilter_nb : natural;
  21. BEGIN
  22. coeff_nb := 0;
  23. sf_coeff := 0;
  24. subfilter_nb := 0;
  25. coeff_for_matrix : FOR coeff_nb IN 0 TO cst_nb_coeffs_filter_in-1 LOOP
  26. matrix_coeffs(subfilter_nb)(sf_coeff) <= i_coeffs(coeff_nb);
  27. subfilter_nb := subfilter_nb+1;
  28. IF (subfilter_nb = cst_nb_subfilters) THEN
  29. sf_coeff := sf_coeff+1;
  30. subfilter_nb := 0;
  31. END IF;
  32. END LOOP coeff_for_matrix;
  33. END PROCESS fill_coeff;
  34. -- instanciation of the shift-reg for polyphasd filter
  35. shift_reg_inst : ENTITY work.POLY_SHIFT_REG(Fill_Matrix)
  36. PORT MAP (i_clk => i_clk,
  37. i_data => i_data,
  38. o_data => matrix3D_reg_out_simple_rif_in
  39. );
  40. -- instanciation of the cst_nb_subfilters subfilters
  41. simple_fir_inst_loop : FOR i IN 0 TO cst_nb_subfilters-1 GENERATE
  42. simple_fir_inst : ENTITY work.TREE_FIR(Simple_Fir)
  43. PORT MAP(i_clk => i_clk,
  44. i_coeffs => matrix_coeffs(i),
  45. i_data => matrix3D_reg_out_simple_rif_in(i),
  46. o_data => matrix_fir_out(i)
  47. );
  48. END GENERATE simple_fir_inst_loop;
  49. o_data <= matrix_fir_out;
  50. END ARCHITECTURE polyphase;